PVD-Grown SiO₂ Solid Electrolyte for Proton-Mediated Electric Double-Layer Transistors

Yu-Cheng Chang^1*, Sheng-Lun Cheng², Hui-Hsin Lu¹, Der-Hsien Lien¹

¹Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
²Institute of Pioneer Semiconductor Innovation, National Yang Ming Chiao Tung University, Hsinchu, Taiwan

* Presenter:Yu-Cheng Chang, email:barry2325899@gmail.com

Recently, electrical double-layer transistors (EDLTs) have been widely studied for their potential in low-power electronics and neuromorphic computing. The electric double layer allows large capacitance under small gate bias, which reduces the operating voltage. The slow movement of ions compared to electrons also helps emulate synaptic and neuronal behaviors. However, conventional EDLTs often use ionic liquids (ILs) as gate dielectrics, whose liquid nature, sensitivity to the environment, and stress during freezing make them unsuitable for Si-based technologies. In this study, CMOS-compatible PVD-grown SiO₂ was employed as a solid-state electrolyte. Capacitance–voltage (C–V) measurements revealed a pronounced frequency-dependent behavior, with a large capacitance of 5 µF/cm² at 20 Hz. When implemented as the gate dielectric in In₂O₃ back-gate transistors, the devices exhibited counterclockwise hysteresis and a distinct memory window. To clarify the origin of the EDL behavior in PVD-grown SiO₂ , vacuum electrical measurements, annealing tests, and SIMS analyses were performed. The results indicate that the EDL formation originates from proton migration within the SiO₂ network. The porous structure allows moisture absorption, providing protons that hop through Si–OH bonds under an electric field to form an interfacial EDL. Finally, by employing PVD-grown SiO₂ as a channel passivation layer in In₂O₃ back-gate transistors, we achieved a high field-effect mobility exceeding 100 cm²/V*s together with enhancement-mode operation. These results highlight the dual functionality of PVD-grown SiO₂ in electrolyte gating and interfacial passivation, underscoring its strong potential for future low-voltage oxide electronics.

Keywords: electrical double-layer transistors (EDLTs), amorphous oxide semiconductor, high mobility device